Characterization of Dye-Sensitized Solar Cell Impedance at Low Frequencies with HF2IS Impedance Spectroscope

Co-author and main contributor: Dr. Antonio Braga


The electrical impedance spectroscopy (EIS) technique is used to characterize the physical-chemical processes of the dye-sensitized solar cells (DSSC) using different types of metal oxides semiconductors, dyes or electrolytes [1]. The EIS technique can be applied to obtain the DSSC frequency response over a wide frequency range from mHz up to MHz. The measured response is essentially a set of impedance spectra from which one can reconstruct the equivalent circuit model. This model, made up of a complex network of RC circuits, represent the material properties and interfaces within DSSC. The fitting of the RC values of the model to the EIS measurement result allows one to obtain both qualitative and quantitative insights of the physical-chemical phenomena which take place within the DSSC.

Previously, an application note on DSSC measurement from 200 mHz to 100 kHz  in collaboration with the Department of Physics at University of Basel was published on the Zurich Instruments website. In this blog, our goal is to show you some useful tips and tricks for your DSSC measurements with the HF2IS Impedance Spectroscope including pushing the measurement frequency down to 10 mHz at different dc bias voltages.

Experimental Setup

The experimental setup for impedance spectroscopy measurements consists of the typical 4-Term configuration (see Figure below). Both channels of the HF2IS Impedance Spectroscope are used to measure voltage and current simultaneously. The current is converted into voltage with an external HF2TA Transimpedance Amplifier. A dc bias voltage can be applied to the DSSC through the Auxiliary Output. Different biasing conditions will generate different responses of the device which will be reflected in the measurement of the impedance spectra. The ziControl setup for 4-Term measurement can be found in this blog.


To save your data, use the Save As button in the Sweeper and a folder with various CSV files will be saved in the specified location. Among these CSV files you will find one ready to be uploaded with ZView. ZView is a nice tool to fit the measurement data into a pre-defined RC model.

Measured Impedance Spectra

Below is a series of Cole-Cole or Nyquist plots taken at various dc biases, while the solar cells are kept in dark condition (i.e. no light impinging of the device). The plots are progressively zoomed in from top to bottom in order to show clearer the shapes of the smaller impedance arcs. The right side of the impedance arcs represent the measurement at 10 mHz while the left extreme of the arcs represent the measurement at 100 kHz. Each arc represents a different dc bias. The arc values varies across several order of magnitudes over a few hundred milli-volts of dc bias.

DSSCs present different impedance behaviour as a function of the dc bias applied voltage. At low bias potentials close to 0 V, the resistivity of the metal oxide nanoparticles is extremely large since the semiconductor is in a non-conductive state. So the main features in the spectra comes from the charge transfer from the front contact a transparent conductive oxide covered with the buffer layer placed below the porous nano-network and the liquid electrolyte. The spectra have only one big semicircle given from a single resistor-capacitor in parallel. At the intermediate bias potentials at about half of the open circuit voltage VOC, the metal oxide semiconductor resistivity decreases and becomes more and more conductive. Typically, the spectra start to show additional features. The main feature is still a semicircule due to the parallel recombination resistance and chemical capacitance. However, in the medium high frequency region, one can start seeing the on-set of another semicircle emerging on the left side of the main semicircle which accounts for electrons transport in the metal oxide (very small) eventually combined with the emerging feature related to charge transfer at the counter-electrode. At high bias potentials at close to or higher than VOC, the Fermi level in the semiconductor is pinned toward the conduction band, giving a very high concentration of electrons. Therefore, the metal oxide resistance is negligible, and the simple parallel recombination resistance and chemical capacitance represents the core of an equivalent circuit which produces in the spectra several semicircle features .

In short, the impedance spectra may show three semicircles:

(i) the high frequency semicircle refers to the parallel between counter-electrode charge transfer resistance and Helmholtz capacitance

(ii) the middle semicircle accounts for the recombination resistance at the semiconductor/electrolyte interface and the chemical capacitance of the metal oxide

(iii) low frequency semicircle represents the diffusion impedance in the electrolyte.

The offset of the semicircles from the origin of the x-axis is equivalent to the contribution from the internal AC series resistance of the device including the transparent conductive materials in the front electrode or platinum in the counter-electrode.

For more theoretical explanations of the RC model interpretation, we encourage readers to refer to the theory of impedance spectroscopy applied to dye-sensitized and quantum dot-sensitized solar cells published by Professor Bisquert and Co. [2-5].


Before going into a discussion on what good practices of measuring DSSC should be, let us reconfirm again the shape of the different arcs correspond to the expected behaviour as described above. The following observations can be made:

  • At low bias, the impedance is very big at a few tens of kilo-ohms compared to only a few ohms at high bias
  • When the bias is low, the impedance is so large such that one cannot see even one full arc up to 100 kHz. And no distinguishable characteristics can be seen at low frequencies
  • When the bias becomes higher, smaller semi-circle arcs start to form at very low frequencies.

These multiple arcs are actually what we are interested in since each additional arc gives up more information on the physical properties of the DSSC. With these observations, we can now give some advice on the ziControl settings when characterizing the impedance of a DSSC cell.

DSSC Impedance Measurement Tips

Here, we will discuss some optimizations that one can do in ziControl in order to get faster and more reliable results for a DSSC measurement. Particular attention should be paid to three settings when testing DSSC: driving ac voltage, digital filter parameters and dc bias.

Driving ac voltage

A suitable signal output amplitude should be selected to maintain the linear response of the DSSC under test. Remember that we will be modeling the measured response in a passive linear RC circuit network. Here we suggest using a value of 10 – 20 mV which is actually not that big as a driving voltage. This will have some effects on the signal-to-noise ratio of the measurement signal, especially at low dc biases as we have seen. Having said that, having a small drive voltage turns out not to hinder our measurement since we are more interested in results obtained at high biases which generates current signals with better signal-to-noise ratio due to smaller impedance.

Digital filter parameters

For the ziControl filter setting, we suggest to use 48 dB/oct filter slope due to the fact that we will be measuring at the low frequency region where 1/f noise is strong. The higher filter slope order helps to minimize the effect of 1/f noise around low measurement frequencies. Normally. auto bandwidth, high number of averaging and high number of TCs are recommended when using the Sweeper, especially at very low frequencies down to 10 mHz. Having said that, one may not need to use high averaging or higher TC mode in the Sweeper at high biases due to high signal level. And there is no point to measure down to 10 mHz anyway for low biases since we do not acquire additional small semicircle features. With some intelligent selection of bias condition and frequency sweep ranges, the overall measurement time can be greatly reduced. For our measurement, taking a high bias measurement at 70 points from 10 mHz to 100 kHz takes about 3 hours without setting averaging or high TC mode. This represent the most result and is quite good as it can be seen. Again, it is generally sufficient to do lower bias measurement without going down to 10 mHz.

Finally, sinc filters should also be turned on in the Sweeper for measurement below 1 kHz. The filter time constant automatically calculated from the auto bandwidth function will take sinc filter into account and reduce the actual measurement time constant accordingly based on an internal algorithm.

DC bias

As highlighted in the blog describing the procedure of plotting the I-V curve of a P-N junction device, junction devices such as solar cells have a non-linear bias voltage dependent behavior. One must therefore measure the actual shunt dc voltage across the DSSC. In other words, the dc bias applied from the Auxiliary Output might not necessarily be the voltage drop across the DSSC being biased.

Therefore, to ensure a proper bias condition is being applied, the Scope tool can be used to manually adjust the bias. As shown in the screenshot below, the Scope can be used to monitor the dc voltage drop on the Signal Input 2. Auxiliary Output offset voltage can be manually adjusted until the Scope readout reaches the desired bias value, in the case, 850 mV.


Separate the frequency sweep into two parts

In the blog on the frequency sweeper, it was recommended the frequency sweep should be divided into low frequency sweeps and high frequency sweeps due to the reason of large difference in signal range and time constant requirement. This rule applies as well for DSSC impedance measurement. Furthermore, it is recommended to check the dc bias using the Scope as described above between separate sweeps since DSSC has a tendency to drift in voltage over time.


In this blog, we went through a real DSSC impedance spectra measurement exercise and pointed out ways that can save measurement time while maintaining the quality of the measurement. One of the biggest challenges of the DSSC characterization is to perform all the measurement in as short time as possible to minimize the effect of voltage drift. In practice, the measurement time naturally grows longer as one tries to measure at very low frequencies where the most interesting results reside. Nevertheless, it is still possible to obtain the necessary information with minimal influences of voltage drift by optimizing the measurement settings as laid out in this blog.


We would like to thank Dr. Thilo Glatzel and Res Jöhr from the Nanolino-Meyer Group of University of Basel in Switzerland, for providing Zurich Instruments the very robust DSSC sample for the impedance measurement.


[1] M. Grätzel, Nature 2001, 414, 338-344.

[2] F. Fabregat-Santiago  et al., Solar Energy Materials & Solar Cells, 2005, 87, 117–131.

[3] Q. Wang et al., J. Phys. Chem. B, 2006, 110 (50), 25210–25221.

[4] V. González-Pedro et al., ACS Nano, 2010, 4 (10), 5783–5790.

[5] F. Fabregat-Santiago  et al., Phys. Chem. Chem. Phys., 2011, 13, 9083-9118.

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